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題名 | 低溫微波退火應用於高介電薄膜/金屬閘極元件之研究=Study of High-k Metal-Gate by Low Temperature Microwave Annealing |
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作者姓名(中文) | 蔡博安; 陳政耀; 賴瓊惠; 羅志偉; 李耀仁; | 書刊名 | 奈米通訊 |
卷期 | 20:3 2013.09[民102.09] |
頁次 | 頁14-19 |
分類號 | 448.552 |
關鍵詞 | 金屬閘極; 氮化鉭; 氮化鈦; 微波退火; 功函數; Metal gate; TiN; TaN; Microwave annealing; Work function; |
語文 | 中文(Chinese) |
中文摘要 | 為了改善互補式金氧半電晶體的特性,用來取代 n+/p+多晶矽閘極的金屬材料之功函數必須接近矽材料的導帶與價帶。閘極後製 (Gate Last)的製程方式已被提出可抑制在高溫摻雜活化後,所導致的功函數偏移與高介電係數介電層的退化。然而,閘極後製卻因製程步驟繁雜,因而導致電路設計與操作範圍限制。因此,如果傳統的閘極先製 (Gate First)的方式,在摻雜活化的製程中能夠同時抑制功函數偏移與高介電係數介電層的等效氧化層厚度 (Effective Oxide Thickness, EOT)增加,那麼閘極先製的方式將有效的避免了閘極後製製程步驟繁雜的缺點,電路設計上將變得更簡單以及有效降低成本。本文將探討低溫微波退火製程應用於高介電薄膜 /金屬閘極元件,並且比較對於功函數偏移,介電層的等效氧化層厚度與短通道效應等影響。 |
英文摘要 | To improve the performance of complementary metal-oxide-semiconductor (CMOS) devices, it is necessary to use a pair of metals with work functions that are near the conduction-band and valence-band edges of silicon to replace conventional n+/p+ poly-Si gate materials. Gate-last process has been adopted to eliminate work function shift, which occurs from the band-edge to the mid-gap and high-k dielectric degradation after high temperature thermal process for dopant activation in source/drain (S/D) regions. However, these complex processes lead to restrictions on circuit design and process window. If gate-first process efficiently suppresses work function shift of metal gate electrodes and decreases equivalent oxide thickness (EOT) of gate dielectrics after dopant activation process, it will become a promising candidate to simplify and reduce cost of nowadays CMOS fabrication process. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。