頁籤選單縮合
題名 | IC元件X、Y平面及Z方向置放良率分析=The Placement Yield Analysis for IC Components in the X-Y Plane and Z Direction |
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作者姓名(中文) | 謝至傑; 黃乾怡; | 書刊名 | 工業工程學刊 |
卷期 | 21:4 2004.07[民93.07] |
頁次 | 頁339-348 |
分類號 | 494.568 |
關鍵詞 | 電子構裝; 置放良率; 空銲; 蒙特卡羅模擬技術; Area array component; Placement yield; Open joint; Monte carlo simulation; |
語文 | 中文(Chinese) |
中文摘要 | 電子產品高功能密度之需求促使電子元件I/O間距日趨減小,此將影響印刷電路板組裝製程之IC元件置放良率。本研究針對週邊式構裝的QFP及陣列式構裝的BGA/CSP等元件,分析其組裝製程,考量元件、基板與置件機台相關參數之變異,運用蒙特卡羅模擬方法,預測平面X、Y方向置放良率及非平面Z方向是否發生空銲現象。 |
英文摘要 | The market demand has driven the electronic products toward the increased functionality and end product size/weight miniaturation. The above mentioned requirements significantly reduce the I/Os pitch. This would impact the assembly/packaging process yield of the devices. This research analyzes the assembly process parameters, component variations, board designs, accuracy of IC placement equipments as well as the deformation of substrates, etc. The two commonly used components, namely QFPs and BGAs/CSPs, are under consideration. The former were known as periphery array devices and the later were known as area array devices. Monte Carlo simulation technique was used to predict the placement yield considering the lead/pad coverage in the X-Y plane and Z direction. |
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