查詢結果分析
來源資料
相關文獻
- 用於自動雷達系統的一個具有新型雙平衡式混波器並整合平衡器之21~27 GHz CMOS接收機前端電路
- 2.4 GHz Circular-Polarization LNA Receiving-Type and PA Transmitting-Type Active Patch Antennas for ISM Band Wireless Communications
- 應用於DCS 1800系統之低雜訊放大器設計與製作
- 低雜訊放大器設計原理
- 採用0.35微米矽鍺雙極互補金氧半導體製作之TD-SCDMA接收機射頻前端積體電路
- 2.5V 0.25μm CMOS全積體化低雜訊放大器
- Study on Noise Properties and Parasitic Effect of Low Noise Amplifiers with Source Inductance Feedback
- A 1-V 5.8-GHz Low Noise Amplifier in A 0.35-μm Standard CMOS Process
- 正確選擇低雜訊放大器
- Modified Determinations of Stability Criteria for Accurate Designing the Matched Low-Noise Amplifier
頁籤選單縮合
題 名 | 用於自動雷達系統的一個具有新型雙平衡式混波器並整合平衡器之21~27 GHz CMOS接收機前端電路=A 21~27 GHz CMOS Receiver Front-End with a Novel Double-Balanced Mixer and Integrated Balun for Automatic Radar Systems |
---|---|
作 者 | 李仁豪; 陳永親; 林佑昇; 呂學士; | 書刊名 | 奈米通訊 |
卷 期 | 19:3 2012.09[民101.09] |
頁 次 | 頁8-14 |
分類號 | 448.57 |
關鍵詞 | 接收機前端; 低雜訊放大器; 低功率; 雙平衡式混波器; 低雜訊; 隔離度; Receiver front-end; LNA; Low power; Double-balanced mixer; Low noise; Isolation; |
語 文 | 中文(Chinese) |
中文摘要 | 本篇描述一個以標準 0.18微米 CMOS製程整合低雜訊放大器和具有中頻放大器的新型雙平衡式混波器和 LO端平衡器的接收機前端電路。我們使用一個共源極電晶體並且搭配電感並聯回授,來取代傳統的兩個電晶體和一個電流源的雙平衡式混波器以改善雜訊指數。此接收機消耗 24.12毫瓦,在 21 ~ 27GHz的轉換增益為 14.83 ± 1.94 dB,而在 21 ~GHz的雜訊指數為 5.96 ~ 6.86 dB,此外,在 15 ~ 30 GHz間的三端隔離度 LO-IF、RF-IF和 LO-RF更分別可以達到~ 48.76 dB、20.27 ~ 31.15 dB和 60.45 ~ 72.75 dB。1-dB增益壓縮點和輸入三階交錯點的量測值分別是 -24和 -13.3 dBm。在不包含測試墊情況下的晶片面積是 1.21 x 0.773 mm2,也就是 0.935 mm2。 |
英文摘要 | This paper describes a monolithic receiver front- end comprising a low-noise amplifier (LNA), and a novel double-balanced mixer with an IF amplifier and an integrated LO-port balun implemented in a standard 0.18 µm CMOS technology. To improve the NF of the double-balanced mixer, instead of the traditional RF differential transconductance stage using two transistors and a current source, an inductive-parallel-feedback common-source transistor is used. The receiver front-end dissipates 24.12 mW and exhibits a CG of 14.83 ± 1.94 dB for frequencies 21 ~ 27 GHz and an NF of 5.96 ~ 6.86 dB for frequencies 21~25.4 GHz. In addition, excellent isolation is also achieved. The measured LO-IF, RF-IF and LO-RF isolation is -39.7 ~ -48.76 dB, -20.27 ~ -31.15 dB and -60.45 ~ -72.75 dB, respectively, for frequencies 15 ~ 30 GHz. The measured input 1 dB compression point (P1dB) and input third-order compression point (IIP3) are -24 and -13.3 dBm, respectively. The chip area is only 1.21×0.773 mm2, i.e. 0.935 mm2, excluding the test pads. |
本系統中英文摘要資訊取自各篇刊載內容。