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題名 | 奈米鍺元件之製備=Fabrication of Ge Nano-scaled MOSFETs |
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作者 | 許舒涵; 羅廣禮; 朱俊霖; 沈奕伶; 姚潔宜; 郭美玲; 周棟煥; 簡依玲; 吳建霆; 林昆霖; | 書刊名 | 奈米通訊 |
卷期 | 20:1 2013.03[民102.03] |
頁次 | 頁18-25 |
分類號 | 448.552 |
關鍵詞 | 鍺; 鰭式電晶體; 全包覆式電晶體; Ge; FinFET; Gate-all-around; |
語文 | 中文(Chinese) |
中文摘要 | 相較於矽,純鍺材料的電晶體運行速度可提升 2至 4倍,而由胡正明院士發明的鰭式電晶體已讓英特爾成功進入 22奈米世代,並可望延續至 14奈米甚至更小。我們新發表的「三角型鍺鰭式電晶體」技術,成功利用選擇性缺陷移除技術,克服了矽基材上的鍺通道會有許多缺陷的問題,成功製作出電性表現良好的鍺 N型與 P型全包覆式電晶體,更進一步利用具有高電子遷移率之鍺(111)通道,達到約兩倍以上的整體電流提升。 |
英文摘要 | At 14-nm and smaller sizes, strained-silicon channels in FinFETs are not projected to offer adequate performance. A germanium (Ge) gate-all-around (GAA) architecture is a promising approach, because Ge FETs offer better performance than their silicon counterparts. However, integrating germanium with silicon or silicon-oninsulator substrates is difficult. Atomic lattice mismatch between the materials causes performance-degrading defects and dislocations at the interface. To get around this, we looked at whether etching away these defects would be possible and beneficial. Through clever use of anisotropic etch processing techniques, we produced triangular GAA germanium FinFETs with greater performance than other Ge FETs have shown. |
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