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題名 | 奈米級CMOS元件製程參數之自動化量測與萃取=Automatic Measurement for Device/Process Parameters Extraction on Nano CMOS Devices |
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作者姓名(中文) | 黃恆盛; 段復元; | 書刊名 | 臺北科技大學學報 |
卷期 | 35:1 2002.03[民91.03] |
頁次 | 頁27-33 |
分類號 | 448.533 |
關鍵詞 | 有效通道長度; 製程參數; C-R方法; 自動化量測; 源/汲極串聯電阻; 閘/汲極間電容; Effective channel length; L□; Process parameter; C-R method; Automatic measurement; Source-to-drain series resistance R□; The gate to drain capacitance C□; |
語文 | 中文(Chinese) |
中文摘要 | 在CMOS技術中,不論是元件設計或電路模擬,通道長度都是非常重要的參數,雖然已經有許多的方法被提出來萃取有效通道長度,其中大部分是以I-V量測[1][2]為基礎,也有其他少數方法是以C-V量測[3]為基礎,但是這些方法都無法有效而準確的萃取元件參數,尤其是元件已經進步到0.13μm以下之際。在本篇報告中,我門將提出一個新的量測方法--電容比例量測法(C-R method[6][7][8][9][10][11]),根據我們所提出的新方法,可以輕易而有效的決定有效通道長度L□、冶金通道長度L□、製程偏差長度L□、延伸重疊長度L□、源/汲極串聯電阻R□、閘/汲極間電容C□等元件參數。 同時根據C-R method的量測法,我們發展了一套自動化量測系統來幫助萃取以上這些參數。透過自動化量測與萃取過程,任何工程師都可以輕易的萃取元件參數並作製程監控。 |
英文摘要 | In CMOS technology, channel length is a key parameter used for device design and circuit simulation. Many methods have been proposed for the extraction of effective channel length. Most of those methods are based on I-V measurement and some others are based on C-V measurement. But all of above methods can not work well as device scaled down to 0.13 micron and beyond. In this paper we proposed a new approach for extracting advanced CMOS device parameters by using a modified C-V method, which named capacitance-ratio method (C-R method). Using the C-R method, we could determine the effective channel length L□, metallurgical channel length L□, process bias L□, extension overlap bias L□, source-to-drain series resistance R□, and the gate to drain capacitance C□ easily. To improve the extracting speed of C-R method, an automatic measurement system is developed to help quickly extracting these device or process parameters. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。