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頁籤選單縮合
題 名 | 低雜訊輸出緩衝電路之設計=A Low Noise Design for Output Buffer Circuit |
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作 者 | 蕭明椿; 陳宏仁; | 書刊名 | 樹德學報 |
卷 期 | 24 1999.08[民88.08] |
頁 次 | 頁133-143 |
分類號 | 448.532 |
關鍵詞 | 輸出緩衝電路; 分流裝置; 雜訊; 晶片; 穩定度; Input buffer; Voltage swing; Undershoot; Threshold voltage; Over-voltage stress; Static leakage current; |
語 文 | 中文(Chinese) |
中文摘要 | 本文提出一種新穎的輸出緩衝電路,該輸出緩衝電路係於傳統輸出緩衝電路中加 入一分流裝置,俾有效抑制接地端所感應之瞬間電位差,並避免接地電壓位準的浮動以及雜 訊的發生,同時提升整個晶片之穩定度。 |
英文摘要 | A novel output buffer circuit with noise immunity has been developed. The feature of the output buffer circuit is that a shunt means is introduced and appended in the conventional output buffer circuit. The shunt means can drain the part of current of the output transistor, while the output transistor is transited from OFF state to ON state. This novel output buffer circuit can efficiently inhibit the instant induced voltage of the ground and prevent ground voltage from fluctuation. Therefore, the noise immunity and the stability of the entire semiconductor chip can be improved. |
本系統中英文摘要資訊取自各篇刊載內容。