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題名 | ADM150之VTADJ晶片設計=Chip Design of VTADJ |
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作者姓名(中文) | 林壽煦; 林尚亭; | 書刊名 | 電信研究 |
卷期 | 27:1 1997.02[民86.02] |
頁次 | 頁31-41 |
分類號 | 448.552 |
關鍵詞 | 指標; 同步光纖網路; Pointer; Synchronous optical network; SONET; |
語文 | 中文(Chinese) |
中文摘要 | VTADJ(虛擬支路指標調整器)是一顆單晶片可程式、多通道、具SONET VT1.5/VT2 虛擬支路負載對齊指標處理功能之應用積體電路。 此晶片可經由調整 STS-1 和 VT 層級之指標值來補償輸入端與輸出端之 STS-1 和 VT 層級同步負載封包的相位差與頻率 差。 補償後之 STS-1 指標值固定為零,而每一路 VT 指標值則視其輸入端與輸出端之相位 差與頻率差調整為適當之指標值。 經虛擬支路負載對齊後之 STS-1 訊號可應用於 VT 之時 槽交換。VTADJ 採用 LSI Logic 之低功率 3.3 V 核心邏輯,5 V 輸入混合電壓、0.6 μ m LCA300KL CMOS 邏輯陣列製程,閘數目略大於十萬之上。 |
英文摘要 | The VTADJ (Virtual Tributary pointer ADJustmenter) chip is an ASIC (Application Specific Integrated Circuit) that implements a programmable, multi-channel, VT1.5/VT2 pointer processor for alignment of SONET virtual tributaries. This chip compensates the phase and frequency difference between incoming and outgoing STS-1 and VT level synchronous payload envelope by adjusting the STS-1 and virtual tributary pointers. The compensated STS-1 pointer value of the outgoing STS-1 signal is fixed to zero and each VT pointer value is offset to a valid position. The VT-aligned STS-1 signal can be used for VT time slot interchange. The VTADJ chip is designed with mixed voltages which include low power 3.3 V core logic, 5 V I/O and LSI Logic 0.6 μ m LCA300KL CMOS gate-array process and the number of gate count is above 1000,000. |
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