頁籤選單縮合
題名 | 原子層沉積技術在奈米製程之應用=Application of Atomic Layer Deposition on Template-Directed Growth of Nanostructures |
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作者 | 柯志忠; 游智傑; 卓文浩; 蕭健男; Kei, Chi-chung; Yu, Chih-chieh; Cho, Wen-hao; Hsiao, Chien-nan; |
期刊 | 科儀新知 |
出版日期 | 20081000 |
卷期 | 30:2=166 2008.10[民97.10] |
頁次 | 頁55-64 |
分類號 | 448.533 |
語文 | chi |
關鍵詞 | 原子層沉積技術; 奈米元件; 半導體; |
中文摘要 | 原子層沉積技術目前已經廣泛地應用在半導體產業,由於該項技術具有極佳的成長厚度控制性、階梯覆蓋性與大面積均勻性,因此已逐漸地應用在奈米材料的製作與表面改質。在本文中筆者除了介紹原子層沉積技術的原理,並將依照奈米模板材料種類說明原子層沉積技術在奈米製程之應用,以及改良傳統光電元件之實例。 |
英文摘要 | Atomic layer deposition (ALD) is widely applied in semiconductor industry due to excellent film thickness control, step coverage and large-area uniformity. Recently, more and more efforts have been put on the applications of ALD on preparation or surface modification of nanostructures. In this article, the concept of ALD will be given first, followed by the preparations of nanostructures by using ALD with different templates. Applications of ALD on field emitter, photonic crystal device and solar cell are also elucidated. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。