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題 名 | Grouped Branch Prediction for x86 Superscalar=x86超級純量機器之分支指令群集預測 |
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作 者 | 黃樹林; 賴飛羆; | 書刊名 | 明志工專學報 |
卷 期 | 30 1998.05[民87.05] |
頁 次 | 頁15-31 |
分類號 | 448.6 |
關鍵詞 | 分支預測; 超級純量; 分支目的地緩衝器; 預測正確率; Branch prediction; Superscalar; Branch target buffer; Prediction accuracy; |
語 文 | 英文(English) |
中文摘要 | 現代微架構多使用超級管線與超級純量技術來增進系統效益。為了減低由分支指 令所產生之管線阻礙,許多分支預測的架構及方法被提出。然因超級純量機器一次會提取一 個以上之指令,造成在一個硬體週期中可能同時提取多個分支指令。過去之架構只針對一個 分支指令做預測,當多個分支指令位址同時送入預測單元處理時,於實際應用中將造成嚴重 之問題。 在本篇論文中,針對x86超級純量機器,提出一個範圍關聯式分支目的地緩衝器架構, 能夠作多個分支指令辨認及群集預測。許多的群集架構設定被考慮並且以SPEC95int加以模 擬比較。我們獲得以下結論:在合理的預測視野大小下,同時對相同快取方塊之第二,甚至 第三個分支指令作群集預測,將增加分支指令預測正確率。我們模擬結果顯示,僅對第一個 分支指令作預測之純量架構失誤率皆高過10%,而我們的架構中使用32位元範圍預測之失 誤率降到5.3%。 |
英文摘要 | Modern micro-architectures employ super-pipline and super-scalar techniques to enhance system performance. In order to reduce the pipeline bubbles produced by branch instructions, there are various branch prediction schemes proposed. Since the superscalar microprocessors fetch more than one instruction at a time, there are cases that multiple branches are encountered in one cycle. And in practical implementation this would cause serious problems while there are variable number of instruction addresses that look up the Branch Target Buffer simultaneously. In this paper, we propose a Range-Associative BTB that is capable of multiple branch recognition and making prediction on these branches for x86 superscalar processors. Several configurations of grouped branch prediction are considered, simulated, and compared on the SPECint 95 benchmarks. We conclude that in a reasonable size of prediction scope, the accuracy of branch prediction can be improved by supporting second and/or third branch prediction at the same cache line in one cycle. Our simulation results show the misprediction ratio of a scalar scheme predicting only the first branch is above 10%, and our scheme with range of 32 bytes can reduce themisprediction ratio to 5.3%. |
本系統中英文摘要資訊取自各篇刊載內容。