查詢結果分析
相關文獻
頁籤選單縮合
題 名 | VLSI Implementation of Wavelet-based Electrocardiogram Compression and Decompression |
---|---|
作 者 | Chan, Hsiao-lung; Chiu, Yi-chun; Kao, Yun-an; Wang, Chun-li; | 書刊名 | Journal of Medical and Biological Engineering |
卷 期 | 31:5 2011.10[民100.10] |
頁 次 | 頁331-338 |
分類號 | 415.3023 |
關鍵詞 | Electrocardiogram; ECG; Data compression; Wavelet transform; Bit-field preserving; Very-large-scale integration; VLSI; |
語 文 | 英文(English) |
英文摘要 | Abstract Wavelet-based methods are mostly used for electrocardiogram (ECG) compression. By decomposing an ECG signal into multilevel wavelet coefficients, post-hoc encoding reduces the number of data bits for which the morphological characteristics can be still retained. ECG compression has a regular, data-independent manipulation that benefits implementation of very-large-scale integration (VLSI). This paper proposes VLSI architectures for ECG compression/decompression based on 3-level lifting discrete wavelet transform, bit-field preserving, and running-length encoding/decoding. The proposed architectures were implemented using Verilog hardware description language and verified in the Simulink and field-programmable gate array through the System Generator. Based on the MIT/BIH arrhythmia database, the compression ratio was 6.06 ± 0.22 with an accepted rate of 98.96% by a cardiologist when the lengths of the preserved bit-fields were set to 6, 4, 2, and 0 for the a3, d3, d2, and d1 wavelet coefficients. |
本系統中英文摘要資訊取自各篇刊載內容。