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題名 | Class-AB Rail-to-rail CMOS Buffer Amplifier for TFT-LCD Source Drivers=應用於薄膜電晶體液晶顯示器資料驅動電路的AB類軌對軌互補式金屬氧化物半導體場效電晶體緩衝放大器 |
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作者 | 陳彥廷; 汪芳興; | 書刊名 | 興大工程學刊 |
卷期 | 21:3 2010.11[民99.11] |
頁次 | 頁105-116 |
分類號 | 448.533 |
關鍵詞 | 緩衝放大器; 互補式金屬氧化物半導體場效電晶體; 共模拒斥比; 薄膜電晶體液晶顯示器; 資料驅動電路; Buffer amplifier; CMOS; Common-mode rejection ratio; CMRR; Source driver; TFT-LCD; |
語文 | 英文(English) |
中文摘要 | 本研究提出一個以AB類(class-AB)架構所建製的軌對軌互補式金屬氧化物半導體場效電晶體(CMOS)緩衝放大器。主要電路結構包括一偏壓電路、互補式疊接差動對輸入級、共模拒斥比(CMRR)增益級和AB類輸出級。用互補疊接的差動輸入級來達到大範圍的共模輸入範圍(ICMR)及軌到軌的輸出。藉由使用共模拒斥比增益級,來增加開回路增益跟共模拒斥比,因此放大器的輸出誤差可以被大幅縮小,偏移電壓也可降低。此電路是以0.35微米互補式金屬氧化物半導體場效電晶體製程所製。輸出負載是五級電阻電容電路(每個電阻為2千歐姆,每個電容為30微微法拉)。在供應電壓3.3伏特狀態下,中間灰階區段平均偏移電壓大約為0.57毫伏特而輸出範圍為0.011伏特到3.296伏特。上升穩定時間及下降穩定時間分別為1.84微秒和1.34微秒,而且靜態電流只有3.1微安培。本論文的緩衝放大器可應用於大尺寸、高解析度及高色彩深度的薄膜電晶體液晶顯示器(TFT-LCD)資料驅動電路。 |
英文摘要 | A class-AB rail-to-rail CMOS buffer amplifier is proposed and fabricated. The main circuit structure includes a bias circuit, a complementary folded-cascode differential input stage, a common-mode rejection ratio (CMRR) enhancement stage, and a class-AB output stage. With the complementary folded-cascode input stage, high input common-mode range (ICMR) and rail-to-rail output are realized. By utilizing the CMRR enhancement stage, the open loop gain and CMRR have been enlarged, hence errors of the amplifier have been greatly diminished and the offset voltages are decreased by the high gains of the input stage and the CMRR enhancement stage. The circuit is demonstrated by using a 0.35-μm CMOS technology. The output load of the buffer is a 5-stage R-C network (R=2 kΩ, C=30 pF). The average offset voltage is about 0.57 mV in mid-gray levels and the output swing reaches from 0.011 to 3.296 V with a 3.3 V supply voltage. The settling times are 1.84 and 1.34 μs for the rising and falling edges, respectively, and the quiescent current is only 3.1 μA. The proposed buffer amplifier has potential to be applied for source drivers of large-size, high-resolution, and high-color-depth TFT-LCDs. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。