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題名 | 以WCDMA收發機建構軍用系統共通研發平臺之研究=A Military Common Platform Design and an Implementation of WCDMA Baseband Transceiver Using FPGA and DSP |
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作者 | 吳匡時; 鄭美龍; 郭思堯; 左明正; 翁健評; Wu, Kuang-shyr; Cheng, Mei-lung; Kuo, Szu-yao; Tso, Ming-chen; Weng, Chien-ping; |
期刊 | 新新科技年刊 |
出版日期 | 20050100 |
卷期 | 1 2005.01[民94.01] |
頁次 | 頁51-56 |
分類號 | 595.2 |
語文 | chi |
關鍵詞 | 共通平臺; 第三代無線通訊; 基頻收發機; 3G; WCDMA; Baseband transceiver; |
中文摘要 | 通訊技術一日千里,隨著影音通訊時代的到來,軍用收發機之設計需兼顧高效能與彈性。本文介紹自行研發設計之可程式化硬體平臺,並以第三代無線通訊系統WCDMA基頻收發機為例進行設計,實際以FPGA及DSP實作各項功能。發射機端以DSP做通道編碼,FPGA進行信號展頻,接收機端則以FPGA作為內接收機,進行信號解展,DSP做為外接收機,負責通道解碼。本系統雛形已開發完成,並實際以聲音及資料收送作測試,皆可達到即時處理的要求。 |
英文摘要 | This paper describes a design of baseband tranceiver of the WCDMA wireless communication system. The design was implemented by using the FPGA and DSP. For the transmitter, a DSP is used for channel coding while an FPGA performs spreading and modulation of the signal. For the receiver, an FPGA despreads received signals and a DSP then runs channel decoding. The FPGA and DSP in the receiver can be viewed as inner and outer receiver respectively. The prototype of this system has been developed successfully. The testing results show that the requirements of real-time processing and bit error rate can be met. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。