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題名 | Circuit Design of Fuzzy Units for Implementation of Fuzzy System |
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作者 | Li,Chunshien; Wu,Fang-ping; Chen,Jin-long; | 書刊名 | 東南學報 |
卷期 | 28 2005.06[民94.06] |
頁次 | 頁175-184 |
分類號 | 448.595 |
關鍵詞 | 除法器; 模糊晶片; 模糊集合; 乘法器; Divider; Fuzzy chip; FPGA; Fuzzy sets; Multiplier; VHDL; |
語文 | 英文(English) |
中文摘要 | 本文中將利用VHDL來實現模糊集合之電路設計,三種最常被使用的模糊集合-三角形、左梯形及右梯形,將被設計在同一電路之中,我們可利用一個輸入訊號接腳來選擇使用哪一個模糊集合計算歸屬值,本文之設計方法並非採用查表方式。計算歸屬值過程中需同時使用到乘法與除法的運算,本文中所設計之電路其乘法器與除法器的位元數是可以調整的,本文之模糊集合電路可視為建立模糊硬體系統的一個建構方塊,這是該電路設計方法的最大優點,本文之電路將燒錄至FPGA上以驗證該電路之功能。 |
英文摘要 | Circuit design using VHDL for realization of fuzzy sets is presented in the paper. Three types of most used fuzzy sets with triangular, left-trapezoidal and right trapezoidal membership functions, are integrated in a circuit, in which a selection singal is used to indicate the type of fuzzy set for calculation of membership degree. The design approach is not based on look-up table. To calculate membership degree, the calculation needs the operations of both arithmetic multiplication and division. Multiplier and divider with adjustable bit width are designed in the circuit. The merit of the approach lies in integrated design approach to the fuzzy-set circuit, which can serve as a building unit for fuzzy hardware system. The circuit has been implemented on an FPGA for verification of the circuit functionality. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。