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題名 | 以TI數位信號處理器實現IS-95 CDMA用戶機解碼器=Implementing the IS-95 CDMA Mobile Station Decoder on the TI Digital Signal Processor |
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作者姓名(中文) | 湯凱安; | 書刊名 | 電信研究 |
卷期 | 31:5 2001.10[民90.10] |
頁次 | 頁603-616 |
分類號 | 312.9 |
關鍵詞 | Viterbi解碼; IS-95; TI DSP; |
語文 | 中文(Chinese) |
中文摘要 | 在大部分的無線通信系統中,迴旋編碼是錯誤更正(error-correction)編碼中,最常用來解決傳送失真(transmission distortions)的編碼方式。在本文中,我們將略述迴旋編碼與解碼的理論,並以IS-95 CDMA無線通信系統[1]裡所規範的迴旋編碼器架構為例,說明在數位信號處理器(Digital Signal Processor, DSP)中,實現Viterbi解碼演算法的程式技巧,同樣的方法也可以用來對任何迴旋編碼進行解碼。德州儀器TMS320C6x DSP具有八個運算單元(兩個乘法器及六個數學/邏輯單元)[2],可同時並行運作。為了使程式執行能夠達到最好的效率,除了針對演算法本身的特性將程式簡化,另外我們還針對DSP硬體架構的特性,對程式做最佳化處理。 |
英文摘要 | Convolutional coding is a common method of error-correction coding to solve transmission distortions in most wireless communication systems. In this paper we outline the theory of convolutional coding and decoding. By using the convolutional encoder defined in the IS-95 wireless communication system, we illustrate the programming techniques for Viterbi decoding in the digital signal processor. The same method can be used to decode any convolutional code. TI TMS320C6x digital signal processor has eight functional units (two multipliers and six ALUs) which can be executed in parallel. To achieve best performance for the program execution, we minimize the program size according to the characteristic of algorithm. Furthermore, we optimize the program according the characteristic of DSP hardware structure. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。