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題名 | 印刷電路板傳輸線上貫孔之效應=The Via's Effects on PCB Traces |
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作者姓名(中文) | 盧俊郎; 魏遜泰; 黃水可; |
作者姓名(外文) | Lu, Chun-lang; Wei, Shun-tai; Hwang, Scott; |
書刊名 | 電信研究 |
卷期 | 31:4 2001.08[民90.08] |
頁次 | 頁411-423 |
分類號 | 448.533 |
語文 | chi |
關鍵詞 | 貫孔; 時域反射儀; 穿透孔; 繞線; 臨界長度; 接地層; 寄生電容; 寄生電感; 訊號完整性; 簡易同軸探針; Via; Time domain reflectometry; Through-hole; Routing traces; Critical length; Ground plane; Parasitic capacitance; Parasitic inductance; Signal integrity; Simple coaxial probe; |
中文摘要 | 近年來由於高速電路設計對控制特性阻抗要求越來越嚴苛,傳輸線上貫孔(via) 所造成阻抗變化也就成為討論的焦點。本文利用時域反射儀( Time Domain Reflectometry )產生上升時間 200 兆分之一秒的步階波送至測試電路量測反射波形, 並用 IPA510 模擬 軟體針對貫孔效應加以分析。 |
英文摘要 | As signals propagate on PCB traces with faster rise time, the via's capacitive effects change trace's characteristic impedance deeper. Through the years high speed circuit design has asked more accurate in controlling characteristic impedance, concern over a via's effect on PCB "transmission lines" has become a recent topic of discussion. In this paper we send forth a step pulse with 200 pico-second rise time by TDR (time-domain reflectometry) to test coupons and measure its reflective wave, then use IPA510 simulation software to analyze via's effects. |
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