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題名 | A Study of Hardware-Software Co-Synthesis for Distributed Embedded System=分散式嵌入系統之硬軟體共合成研究 |
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作者 | 郭芳熙; | 書刊名 | 景文技術學院學報 |
卷期 | 11(上) 民89.09 |
頁次 | 頁75-81 |
分類號 | 312.49 |
關鍵詞 | 域可程式化陣列閘; 共合成; 嵌入系統; FPGA; Co-synthesis; Embedded system; |
語文 | 英文(English) |
中文摘要 | 一個可重組計算系統,整合傳統計算系統和可程式化硬體元件。此可重組計算系 統為特定應用需求開拓硬體 / 軟體解決方案。 可程式化硬體元件可在執行期間 (或編譯期 間 ) 做動態性的修改,以達應用系統的需求。 因此,系統可以同時獲得軟體的彈性及硬體 的效率之好處。 在嵌入系統中最常用的硬體元件為 " 域可程式化陣列闡 "(FPGA)。雖然域 可程化陣列闡在嵌入系統運作過程中可重組,卻很少被開發應用。近來由於域可程式化陣列 闡重組的速度及彈性之改善,使得動態可重組更為可行,進而降低嵌入系統之硬體元件需求 數量。在本論文中研討自動執行共合成之技術,並指出共合成工具的未來研究機會。 |
英文摘要 | A reconfigurable computing (RC) system combines the traditional computing system with programmable hardware devices. The RC system explores hardware/software solutions for specific application needs. The programmable hardware device is modified at runtime (or compile time) to meet the needs of an application. Thus system could gain the benefits of both flexibility of software and efficiency of hardware. Field programmable gate arrays (FPGAs) are commonly used in embedded systems. Although it is possible to reconfigure some FPGAs while an embedded system is operational, this feature is seldom exploited. Recent improvements in the flexibility and reconfiguration speed of FPGAs have made it practical to reconfigure them dynamically, reducing the amount of hardware required in an embedded system. In this paper we study the proposed technologies that automatically execute the co-synthesis process and figure out the research opportunity for the future of co-synthesis tools. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。