頁籤選單縮合
題名 | 唯讀記憶體感測放大電路的設計=Design of the Sense Amplifien Circuit for Read Only Memory |
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作 者 | 蕭明椿; | 書刊名 | 樹德學報 |
卷期 | 25 2000.03[民89.03] |
頁次 | 頁167-177 |
分類號 | 448.595 |
關鍵詞 | 唯讀記憶體; 感測放大電路; 電壓擺幅; 臨限電壓; 通道寬長比; Read-only memory; Sense amplifier circuit; Voltage swing; Threshold voltage; Channel width length ratio; |
語文 | 中文(Chinese) |
中文摘要 | 文中提出一種嶄新之唯讀記憶體感測放大電路,其不但能一方面追求記憶體之高 速操作,並且亦能滿足低功率消耗之需求。該唯讀記憶體感測放大電路主要係由一反或閘 NOR、-第-PMOS電晶體MP1、-第-NMOS電晶體MN1、一反相器NOT 、-第二NMOS電晶體MN2、-第三NMOS電晶體MN3以及-第二PMOS電晶 體MP2所組成。該唯讀記憶體感測放大電路因具有汲極連接至外部電源電壓EVC之第 二NMOS電晶體MN2,因此可滿足高速操作之需要。同時,因感測放大電路之輸出電 壓擺幅係等於內部電源電壓IVC之準位,而非外部電源電壓EVC之準位,因此,本創 作亦可有效降低功率消耗。 |
英文摘要 | A novel sense amplifier circuit for read only memory of high speed and low power consumption is disclosed. The sense amplifier circuit includes a NOR gate, the first PMOS transistor MP1, the first NMOS transistor MN1, a NOT gate, the second NMOS transistor MN2, the third NMOS transistor MN3, and the second PMOS transistor MP2. The second NMOS transistor MN2 is connected between the external power supply voltage and the output node, so that the sense amplifier can operate at high speed. Moreover, the output voltage swing is equal to the voltage level of the internal power IVC rather than the voltage level of the external power EVC. That is, the sense amplifier can also operate at lower power consumption. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。