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| 題 名 | Reducing Memory Traffic and Accelerating Prolog Execution in a Superscalar Prolog System |
|---|---|
| 作 者 | 馬瑞良; 鍾崇斌; | 書刊名 | Journal of Information Science and Engineering |
| 卷 期 | 15:6 1999.11[民88.11] |
| 頁 次 | 頁859-884 |
| 分類號 | 448.6 |
| 關鍵詞 | Fine-grained parallelism; Memory traffic reduction; Modified windowed register file; Prolog system design; Simulation; Window overflow handling; |
| 語 文 | 英文(English) |
| 英文摘要 | Memory access operations constitute about 32.7% of all the operations executed in a typical Prolog program. Among these memory accesses, 75% are to the program control structures (environments and choice points). These memory accesses plus possible data cache misses greatly impair system performance, and the problem is even more severe in a VLIW, superscalar, or superpipelined Prolog system. This paper describes an innovative windowed register file management technique called SORWT (splittable overlapping register window technique). With SORWT, environments, choice points, and arguments can be stored in a windowed register file. SORWT reduces the number of memory accesses to only 25% of the number made when a conventional stack scheme is used. This paper describes in detail how Warren and PLM instructions can be implemented using SORWT, and it presents a register file overflow/underflow handling mechanism called the memory window matrix (MWM) and a mapping function for use between register windows and the MWM. Thirty benchmark programs are used to study performance issues, the overhead of SORWT, optimal register file and window sizes, and the argument overflow rate. |
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