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題 名 | Optimization of Spacer Width and Source-Drain Implant on pMOS Characteristics for Quarter-Micrometer Devices=閘極的空間寬度及淡濃度佈植的金氧半電晶體之最佳化 |
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作 者 | 梁瑛心; 崔秉鉞; 王是琦; | 書刊名 | 南開學報 |
卷 期 | 2 1997.06[民86.06] |
頁 次 | 頁151+153-162 |
分類號 | 448.5 |
關鍵詞 | 閘極的空間寬度; 汲極邊上淡濃度的佈植; 飽和電流; 漏電流; 基體電流; 開啟電壓; Spacer width; Source-drain doping; Substrate current; Off-state leakage current; Saturation drain current; Threshold voltage; |
語 文 | 英文(English) |
中文摘要 | 本論文乃針對製程上的兩個參數,閘極兩邊的空間廣度參數值,以及源極和汲極 邊上較淡濃度的佈植參數值;對飽和電流,漏電流,基體電流的影響。透過軟體的模擬結果 ,找出基體電流小於 1 微安,漏電流小於 1 微微安,以及為最大的飽和電流情況值,和考 慮開啟電壓值,並找出主要影響元件效能的製程參數。 |
英文摘要 | This paper describes design and optimized of a quarter-micrometer pMOS device. The main purpose of this study is to investigate the impact of two fabrication parameters: spacer width and source-drain concentration, on pMOS characteristics. The concentration shows critical influence on substrate current (Isub) and off-state leakage current (Ioff). To find an optimized device-design, we take spacer length variations and 1 ghtly-doping implant parameters and observe the simulated device characteristics. Based on simulation results, the optimized is selected based on the following criteria: substrate current (Isub) less than 1 micro ampere, off-state leakage current (Ioff) less than 1 pico pico ampere, saturation current of drain (Ids) is maximum and threshold voltage (Vth) is concerned under the constrains of Isub and Ioff. Trade-off between these criteria will be discussed. and the optimization device characteristics agreement with simulation have been found. |
本系統中英文摘要資訊取自各篇刊載內容。