頁籤選單縮合
題名 | The Design of Strongly Fault-Secure and Strongly Code-Disjoint Combinational Circuits= |
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作者 | 魏大雅; Wei, Dah-yea D.; |
期刊 | 國立屏東商專學報 |
出版日期 | 19970500 |
卷期 | 5 1997.05[民86.05] |
頁次 | 頁173-188 |
分類號 | 494.542 |
語文 | eng |
關鍵詞 | Concurrent error detection; Strongly fault-secure; Strongly code-disjoint; Totally self-checking; Combinational circuit; Programmable logic array; Code word; |
英文摘要 | This paper presents a new design method of strongly fault-secure and strongly code-disjoint combinational circuits. In this design, each circuit is formed by three blocks. Block 1 consists of a combinational circuit in random logic which receives only the information part of the input and generate the information part of the output and k-r lower bits of the output check symbol. Block 2 is a PLA with encoded input and generates the r higher bits of the output check symbol in two-rail form. The two-rail encoded higher part of output check symbol is then checked by Block 3: a self-testing two-rail checker alone with the input two-rail signals to generate the output two-rail signal. Contrast to the existing designs, the proposed realizations requires only a small portion of the realization in PLA. This gives flexibility and area efficiency in the proposed realizations. |
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