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題 名 | 可供n-位元進位傳播加法器用之高效率功能測試樣本產生方法=An Efficient Functional Test Patterns Generation Method for n-bit Carry-Propagation Adders |
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作 者 | 陳聰明; | 書刊名 | 萬能學報 |
卷 期 | 24 2002.08[民91.08] |
頁 次 | 頁57-69 |
分類號 | 448.5 |
關鍵詞 | n-位元進位傳播加法器; |
語 文 | 英文(English) |
中文摘要 | 本文提出一極其有效率之方法,來對n-位元進位傳播加法器做功能性測試。功能性測試極具吸引力,因為此法將電路視同一黑盒子,僅須知其外部功能,不須知其內部詳細結構。此特性在積體電路設計時,極其有用,因為在使用一有著智慧財產權之組件時,由於不知其內部電路結構,但又必須和系統中其它部分一起做整體模擬測試時,如何產生功能性測試樣本頗為有用。 本文稍後即將說明,為達到百分之一的單一固值錯誤(stuck-at-fault)涵蓋率,可對n-位元加法器中之每一三位元組加法進行窮舉式之測試,且不論n的值是多大,總共僅需十六組測試樣本,便足以完成全電路之功能性測試。此結果,已用HILO工具軟體進行錯誤模擬加以證實。更有進者,由於用了窮舉式之測試法,對於其它非單一固值錯誤模型亦仍然適用。 |
英文摘要 | An efficient method for generating test patterns for functionally testing an n-bit carry propagation adder has been developed. Functionally testing a circuit is very attractive, because only the function of the circuit is required and the circuit is treated as a black box. This is very useful when there are intellectual property considerations involved in it, such as in integrated circuits design. As to be shown later, to achieve 100% single-stuck fault coverage, exactly sixteen test patterns is needed to exhaustively test each 3-bit addition in the n-bit adders, no matter how large the n is. The result has been verified by fault simulation on HILO. Furthermore, due to exhaustive testing used, this result is surely valid for the fault models other than stuck-at-fault one. |
本系統中英文摘要資訊取自各篇刊載內容。