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題名 | A Class of Hardware-Based Prngs with Maximum Periods=一系列具有高硬體效率並最大週期的偽亂數產生器 |
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作者 | 李仲益; 鄧利源; 鄧利源; | 書刊名 | 中國統計學報 |
卷期 | 55:4 2017.12[民106.12] |
頁次 | 頁145-159 |
分類號 | 319.16 |
關鍵詞 | 偽亂數產生器硬體; 多重遞迴產生器; 最大週期; Hardware-based PRNG; Maximum period; Multiple recursive generator; MRG; |
語文 | 英文(English) |
中文摘要 | 在這篇論文中,提出一系列具有極高硬體效率的偽亂數產生器(PRNGs)。本文所提出階數小的偽亂數產生器,可以有效地降低原本使用多重遞迴產生器(MRGs)所需的硬體消耗。同時也僅增加了些許的硬體消耗,來提高線性同餘產生器(LCG)的統計特性。此外,通過使用台積電0.18 μm 1P6M CMOS製程來驗證提出之偽亂數產生器的硬體吞吐率大於6000 Mbit/s。除了極長的周期之外,所提出之偽亂數產生器可以產生滿足美國國家標準技術局(NIST SP 800-22)所要求的隨機性測試規範的隨機序列。 |
英文摘要 | In this paper, a class of hardware-efficient pseudo random number generators (PRNGs) is proposed. Some small-order PRNGs are provided for efficient hardware implementations, which reduce the hardware cost of multiple recursive generators (MRGs) dramatically. With the small hardware penalty, the proposed small-order PRNGs improve the statistical properties of linear congruential generators (LCGs). Furthermore, the hardware efficiencies are validated by hardware implementations using a TSMC 0.18 μm 1P6M CMOS process with a throughput rate larger than 6,000 Mbit/s. In addition to the extremely long period length, the proposed PRNGs can generate random sequences that fulfill all the randomness requirements of NIST SP 800-22 test suite. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。