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題名 | 0.5伏特具溫度補償機制之非石英式全數位時脈產生器=A 0.5 Volt All-digital Crystal-less Clock Generator Using Temperature Compensation Techniques |
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作者 | 劉仁傑; 張啟揚; 涂祐豪; 鄭國興; 李霈穎; | 書刊名 | 電腦與通訊 |
卷期 | 154 2013.12[民102.12] |
頁次 | 頁33-40 |
專輯 | IC設計技術專題 |
分類號 | 448.5 |
關鍵詞 | 非石英式時脈產生器; 數位控制振盪器; 時間放大器; 製程與溫度補償; Crystal-less clock generator; CLCG; Digital controlled oscillator; DCO; Timing amplifier; TA; Process and temperature compensation; |
語文 | 中文(Chinese) |
中文摘要 | 本論文提出低電壓操作具溫度補償機制之非石英式時脈產生器。此架構利用溫度補償電路,針對晶片溫度改變時,調整時脈產生器之操作頻率,校正到系統所需之目標頻率。當溫度改變時,溫度補償電路利用環形振盪器輸出頻率變化。將其輸出頻率經過時間轉數位轉換器作運算,並送入數位濾波器中,對數位振盪器做頻率補償。若校正頻率的幅度不足時,可以耤由調整時間放大器的增益值,將溫度補償電路的修正幅度提高。當溫度變化從0℃到100℃時,此全數位非石英式時脈產生器在操作電壓為0.5 V時,其操作頻率可達到300 MHz。其架構實現於65 nm CMOS製程下, 晶片面積為353×422 um^2。其功率消耗為1.05 mW且操作頻率精準度達到±2 %。因此,全數位非石英式時脈產生器架構將容易整合於低電壓操作與數位系統應用中。 |
英文摘要 | A low voltage all-digital crystal-less clock generator (CLCG) is presented. All digital CLCG adopts the temperature compensation circuit to calibrate the CLCG operational frequency. The temperature compensation circuit adjusts the operational frequency of CLCG to achieve the target frequency. The temperature compensation adopts ring oscillator to detect the temperature variations. When the temperature varies, the temperature compensation circuit creates the compensation code and feeds the digital code to digital loop filter (DLF). The DLF output codes can adjust the digital controlled oscillator output frequency. If the target frequency is not arrived, the timing amplifier (TA) gain can be adjusted for frequency compensation. Under the temperature range is from 0℃ to 100℃ , the all-digital CLCG output produces a target frequency of 300 MHz under the 0.5 V supply voltage. The core area is 353×422 um^2 in a 65 nm CMOS process. The power consumption and frequency accuracy of CLCG are less than 1.05 mW and ±2%, respectively. This all digital CLCG is suitable for low supply voltage applications and digital systems. |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。