查詢結果分析
相關文獻
頁籤選單縮合
題名 | A Two-Phase Fault Simulation Scheme for Sequential Circuits= |
---|---|
作者 | Wu,Wen Ching; Lee,Chung Len; Chen,Jwu E; |
期刊 | Journal of Information Science and Engineering |
出版日期 | 19980900 |
卷期 | 14:3 1998.09[民87.09] |
頁次 | 頁669-686 |
分類號 | 448.57 |
語文 | eng |
關鍵詞 | Computer-aided-design; Digital testing; Sequential circuits; Fault simulation; Untestable faults; |
英文摘要 | A two-phase fault simulation scheme for sequential circuits is proposed. In this fault simulation, the input sequence is divided into two parts. In the first phase, fault free simulation is performed with the first sequence of patterns. In the second phase, fault simulation is performed with the rest of the patterns. Five cases of faults which result from two-phase fault simulation are discussed in detail. Significant speedup in simulation time can be obtained because this fault simulation approach can quickly drop Case 1 faults, which are time-consuming faults and would be considered undetectable in the traditional three-value fault simulation but are actually detected in exact fault simulation. Almost "exact" results can be obtained for detected faults except for a small percentage of over-detected-faults (ODFs) and under-detected-faults (UDFs). |
本系統之摘要資訊系依該期刊論文摘要之資訊為主。